标准单元
外观
在半导体设计中,标准单元设计方法是指一种特殊应用积体电路设计中使用数字逻辑的方法。
一个标准单元是指一系列由晶体管和连线结构组成的具有布尔逻辑功能或者触发功能的数字单元。
标准单元的应用
[编辑]标准单元通常可以应用在数字电路设计中的综合和布局布线阶段。
布线
[编辑]在使用布局级网表和单元级库版图,布线工具可以增加信号连接线和电源线。
参考资料
[编辑]外部链接
[编辑]- VLSI Technology (页面存档备份,存于互联网档案馆)— This site contains support material for a book that Graham Petley is writing, The Art of Standard Cell Library Design
- Oklahoma State University Portuguese Web Archive的存档,存档日期2016-05-17— This site contains support material for a complete System on Chip standard cell library that utilizes public-domain and Mentor Graphics/Synopsys/Cadence Design System tools
The standard cell areas in a CBIC are build-up of rows of standard cells, like a wall built-up of bricks
- Virginia Tech (页面存档备份,存于互联网档案馆)— This is a standard cell library developed by the Virginia Technology VLSI for Telecommunications (VTVT)
- ChipX (页面存档备份,存于互联网档案馆) - Interesting overview of Standard Cell as well as metal layer configurable chip options.
- Low Power Standard Cell Design (页面存档备份,存于互联网档案馆)
- Excellent Book on Standard Cell Characterization and Modeling (页面存档备份,存于互联网档案馆)